TSMC's 2nm Process Cost Too High, Apple A19 Delayed to 2026

Market reports suggest that Apple is likely to be among the first customers for TSMC’s 2nm process technology. However, due to cost considerations, the A19 processors for the iPhone 17, slated for release in 2025, will not use this technology. Instead, the 2nm process will be adopted for the A20 and A20 Pro processors in the iPhone 18, expected in 2026. By then, TSMC’s monthly production capacity for the 2nm process is projected to increase from the current trial production level of 10,000 wafers to 80,000 wafers.

According to IC design industry insiders, at a unit cost of $20,000 per wafer, a 170mm² 3nm chip can yield approximately 325 chips, with an average cost of $61 per chip. With a selling price of $122 per chip, this translates to a gross margin of 50%. In comparison, using the 2nm process under similar conditions would result in a gross margin of just 32%. Reports also indicate that TSMC’s trial production yield rate for the 2nm process is around 60%, which falls short of the standards required by profit-focused clients for mass orders.

While TSMC has not disclosed specific pricing, industry sources estimate that a single 2nm wafer will cost as much as $30,000. To reduce costs effectively, TSMC’s monthly production volume needs to reach a certain scale. According to a recent Morgan Stanley report, TSMC’s current trial production capacity stands at just 10,000 wafers per month, which is insufficient to drive down costs. However, TSMC projects its monthly output to reach 50,000 wafers by 2025 and 80,000 wafers by 2026, making it feasible for Apple and other companies to place large-scale orders.

Industry analysts predict that Apple may receive a discounted price, estimated at $26,000 per wafer. However, given the cost and architectural transition considerations, Apple’s A19 processors and M5 chips slated for next year are likely to be built using TSMC’s N3P process. Compared to this year’s N3E process, TSMC’s N3P reduces the number of EUV layers and dual patterning steps. While this sacrifices some transistor density, it significantly improves yield and reduces costs.

Additionally, TSMC plans to launch a wafer-sharing service called "CyberShuttle" in April 2025. This service will allow customers, including Apple, to share mask sets, further reducing costs.