Today, Intel officially released the world's highest density FPGA.
The Stratix® 10 GX 10M FPGA has 10.2 million logic cells and is in volume production. This extremely high-density FPGA is based on the existing Intel Stratix 10 FPGA architecture and Intel's advanced Embedded Multi-Chip Interconnect Bridge (EMIB) technology. It combines two high-density Intel Stratix 10 GX FPGA core logic chips (each with a capacity of 5.1 million logic cells) and corresponding I/O cells using EMIB technology. The Intel Stratix 10 GX 10M FPGA has 10.2 million logic cells and is about 3.7 times denser than the Stratix 10 GX 1SG280 FPGA, which is the most densely packed device in the original Intel Stratix 10 family. Intel's EMIB technology is just one of many IC process technology, manufacturing and packaging innovations that enable Intel to design, manufacture and deliver the world's highest density (representing computing power) FPGAs.
As ASIC design increases, so does the need for prototype design and simulation. Suppliers of off-the-shelf (COTS) ASIC prototyping and simulation systems can gain significant competitive advantage if they are able to use the largest FPGAs available today.
Simulation and prototyping systems are designed to help semiconductor manufacturers discover and avoid costly hardware and software design flaws before chip manufacturing, saving millions of dollars.
With the largest FPGAs, you can incorporate large ASIC, ASSP, and SoC designs into as few FPGA devices as possible. Intel Stratix 10 GX 10M FPGAs are the latest in a range of large FPGA families for this type of application. The new Intel Stratix 10 FPGA supports the development of simulation and prototyping systems for digital IC designs that consume billions of ASIC gates. The Intel Stratix 10 GX 10M FPGA with 10.2 million logic cells now supports the Intel® Quartus® Prime Software Suite. The kit features a new dedicated IP that clearly supports ASIC emulation and prototyping.
In addition, the Intel Stratix 10 GX 10M FPGA is the first Intel FPGA to use EMIB technology and logically and electrically combine two FPGA fabrics to achieve up to 10.2 million logic cell densities. On this device, tens of thousands of connections connect two FPGA fabrics through multiple EMIBs, creating a high-bandwidth connection between two monolithic FPGA fabrics.
The P tile used in Intel Stratix 10 DX FPGAs is the first component-level device in the list of PCIe SIG-compliant PCI-SIG system-integrated devices. The same release of the same P tile in the recently released Intel® AgilexTM FPGA is also compatible with PCIe 4.0 devices.
Another example of this application is the P tile used in Intel Stratix 10 DX and Intel Agilex FPGAs, which demonstrates advanced manufacturing and manufacturing technologies such as EMIB and how to get Intel to bring a range of new products to market quickly. And put into full production.