74LVC8T595 Dual Supply Shift Register

Nexperia's 74LVC8T595 dual supply 8-bit serial-in/serial-out or parallel-out shift register, 3-state

Nexperia's 74LVC8T595 dual supply shift register is an 8-bit serial-in or parallel-out configuration with a storage register and 3-state outputs. Separate clocks exist for the shift and storage register. The data in the shift register is transferred to the storage register on a positive-going transition of the STCP input. If both clocks are connected, the shift register is always one clock pulse ahead of the storage register.

V_CC(A) and V_CC(B) can be supplied at any voltage between 1.1 V and 5.5 V making the device suitable for translating between any of the voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). Pins MR, SHCP, STCP, OE, DS and Q7S are referenced to V_CC(A) and pins Qn are referenced to V_CC(B).

The device is fully specified for partial power-down applications using I_OFF. The I_OFF circuitry disables the output, preventing any damaging current through the device when it is powered down. In suspend mode when V_CC(A) is at GND level, the Qn outputs are in the high-impedance OFF-state.