74AUP Series Logic Gates
74AUP Series Logic Gates
Nexperia’s advanced ultra-low power (AUP) logic family provides ultra-low power in a small footprint
Nexperia’s 74AUP family is designed for logic-level translation applications with input switching levels that accept 1.8 V low-voltage CMOS signals while operating from either a single 2.5 V or 3.3 V supply voltage. The wide supply voltage range ensures normal operation as battery voltage drops from 3.6 V to 2.3 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. Schmitt trigger inputs make the circuit tolerant to slower input rise and fall times across the entire VCC range.
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